Project 6: Multicore Real-Time Scheduler

Implement a tiny real‑time scheduler that runs deterministic tasks across two cores.

Quick Reference

Attribute Value
Difficulty Level 4: Expert
Time Estimate 1-2 weeks
Main Programming Language C
Alternative Programming Languages Rust
Coolness Level Level 4: “RTOS brain”
Business Potential 2. Core systems skill
Prerequisites Interrupts, timers, multicore basics
Key Topics Scheduling, priority inversion, inter‑core sync

1. Learning Objectives

  1. Implement a tick‑based scheduler with priorities.
  2. Run tasks deterministically across two cores.
  3. Avoid priority inversion with simple protocols.
  4. Measure jitter and worst‑case execution time.
  5. Build a test harness for scheduling correctness.

2. All Theory Needed (Per-Concept Breakdown)

2.1 Real-Time Scheduling Basics

Fundamentals

Real‑time systems are defined by deadlines. A scheduler decides which task runs when, and the key metric is meeting deadlines rather than maximizing throughput.

Deep Dive into the concept

A tick‑based scheduler uses a timer interrupt to increment time and select the next runnable task. Priority scheduling ensures critical tasks preempt lower ones. However, shared resources can cause priority inversion, where a low‑priority task blocks a high‑priority one. Basic mitigation includes priority inheritance or careful lock discipline. In a microcontroller environment, interrupts are often the highest priority tasks; your scheduler must cooperate with ISRs to avoid jitter. You should measure worst‑case execution time (WCET) for tasks and ensure total utilization stays within safe bounds.

Key insights

  • Real‑time scheduling is about guarantees, not averages.

2.2 Multicore Synchronization (Spinlocks, FIFOs)

Fundamentals

RP2040 provides hardware spinlocks and inter‑core FIFOs for coordination. These are simple but require discipline to avoid deadlocks.

Deep Dive into the concept

Hardware spinlocks are fast but can cause contention if abused. The inter‑core FIFO is good for message passing but has limited depth. For scheduling, you can use one core for time‑critical tasks and the other for background tasks, or run independent schedulers on each core with a shared mailbox. The key is to minimize cross‑core coupling.

Key insights

  • Treat cores as separate timing domains and keep communication minimal.

2.3 Timer Interrupts and Jitter Measurement

Fundamentals

A timer interrupt drives scheduling. Jitter is the deviation from expected timing and should be measured and minimized.

Deep Dive into the concept

Use a hardware timer to generate a periodic tick. Toggle a GPIO in the ISR to measure jitter on a scope. Jitter sources include flash stalls, long critical sections, or other interrupts. You can mitigate by running ISRs from SRAM and keeping them short.

Key insights

  • If you can measure jitter, you can fix it.

3. Project Specification

3.1 What You Will Build

A two‑core scheduler that runs multiple periodic tasks with priorities and logs timing jitter.

3.2 Functional Requirements

  1. Fixed‑rate tick (1 ms or 10 ms).
  2. Priority‑based task selection.
  3. Inter‑core messaging or task partitioning.
  4. Jitter measurement output.

3.3 Non-Functional Requirements

  • Performance: task deadlines met under load.
  • Reliability: no deadlocks under contention.

3.7 Real World Outcome

Tasks run at predictable intervals. A scope trace shows jitter within a defined bound (e.g., ±5 µs).

4. Solution Architecture

4.1 High-Level Design

Timer ISR -> Scheduler -> Task queues
Core0: real‑time tasks
Core1: background tasks

5. Implementation Guide

5.10 Implementation Phases

  • Phase 1: Single‑core scheduler
  • Phase 2: Add priorities and jitter measurement
  • Phase 3: Split across cores

6. Testing Strategy

  • Deadline miss detection
  • Priority inversion test

7. Common Pitfalls & Debugging

  • Holding locks too long
  • ISR doing too much work

8. Extensions & Challenges

  • Add EDF scheduling
  • Add task profiling

9. Submission / Completion Criteria

Minimum Viable Completion:

  • Scheduler runs 3 tasks with correct timing.

Full Completion:

  • Multicore scheduling with jitter reporting.

Excellence:

  • Priority inversion mitigation and WCET analysis.